|
8-D Report |
8 Disciplines
Report |
|
ADC |
Analog-to-Digital
Converter |
|
AIAG |
Automotive
Industry Action Group |
|
AQL |
Acceptable Quality Level |
|
ASEMEP |
Association of
Semiconductor and Electronics Manufacturing Engineers of the Philippines |
|
ASIC |
Application-Specific
Integrated Circuit |
|
ASTM |
American Society
for Testing and Materials |
|
AVL |
Approved Vendors
List |
|
BD |
Bonding Diagram |
|
BGA |
Ball Grid Array |
|
BiCMOS |
Bipolar
Complementary Metal Oxide Semiconductor |
|
BPSG |
Boro-Phospo-Silicate Glass |
|
BSE |
Back-Scattered
Electrons |
|
BST |
Ball Shear Test |
|
CAR |
Corrective
Action Request |
|
CDM ESD |
Charged Device
Model Electrostatic Discharge |
|
CerDIP |
Ceramic Dual
In-line Package |
|
CMOS |
Complementary
Metal Oxide Semiconductor |
|
COL |
Chip On Lead |
|
CSAM |
C-mode Scanning
Acoustic Microscopy |
|
CSP |
Chip Scale
Package |
|
DAC |
Digital-to-Analog
Converter |
|
DCAS |
Defense Contract
Administration Service |
|
DESC |
Defense
Electronic Supply Center |
|
DFM |
Design For
Manufacturability |
|
DFP |
Dual Flat Pack |
|
DFR |
Design For
Reliability |
|
DFT |
Design For Test |
|
DIP |
Dual In-line
Package |
|
DJS |
Diminishing JAN
Source |
|
DO |
Diode Outline |
|
DOE |
Design of
Experiments |
|
DPM |
Defects Per
Million (referring to the defects) |
|
DPM |
Defectives Per
Million (referring to the defective products) |
|
DRAM |
Dynamic Random
Access Memory |
|
DRC |
Design Rules
Check |
|
DSP |
Digital Signal
Processing |
|
ECTC |
Electronic
Components and Technology Conference |
|
EDX or EDAX |
Energy
Dispersive X-ray |
|
EEPROM |
Electrically
Erasable Programmable Read Only Memory |
|
EIA |
Electronic
Industries Alliance |
|
EIAJ |
Electronics
Industry Association of Japan |
|
ELF |
Early Life
Failure |
|
EOS |
Electrical
Overstress |
|
EPI |
Epitaxial Layer |
|
EPROM |
Erasable
Programmable Read Only Memory |
|
ERC |
Electrical Rules
Check |
|
ESCA |
Electron
Spectroscopy for Chemical Analysis |
|
ESD |
Electrostatic
Discharge |
|
ESDS |
ESD Sensitivity |
|
FA |
Failure Analysis |
|
FCOL |
Flip Chip on
Lead |
|
FET |
Field Effect
Transistor |
|
FIB |
Focused Ion Beam |
|
FICDM ESD |
Field-Induced
Charged Device Model ESD |
|
FMEA |
Failure Modes and
Effects Analysis |
|
FTIR |
Fourier
Transform Infrared |
|
GSI |
Government
Source Inspection |
|
HAST |
Highly
Accelerated (Temperature Humidity) Stress Test |
|
HBM ESD |
Human Body Model
Electrostatic Discharge |
|
HSA |
High Speed
Amplifier |
|
HSC |
High Speed
Converter |
|
HTOL |
High Temperature
Operating Life |
|
HTS |
High Temperature
Storage |
|
IC |
Integrated
Circuit |
|
ICT |
In-Circuit Test |
|
IEEE |
Institute of
Electrical and Electronics Engineers |
|
IF |
Intermediate
Frequency |
|
IGBT |
Insulated Gate
Bipolar Transistor |
|
IGFET |
Insulated Gate
Field Effect Transistor |
|
ILD |
Inter-Layer
Dielectric |
|
ILS |
In-Line Sampling |
|
IMAPS |
International
Microelectronics and Packaging Society |
|
IMD |
Inter-Metal
Dielectric |
|
IPC |
renamed to:
Association Connecting Electronic Industries |
|
ISM |
Industrial,
Scientific, Medical |
|
ISO |
International
Organization for Standardization |
|
ISTFA |
International
Symposium for Testing and Failure Analysis |
|
JAN (J) |
Joint Army/Navy |
|
JANS (JS) |
Joint Army/Navy
- most Stringent Reliability Test |
|
JANTX (JTX) |
Joint Army/Navy
with extra testing requirements |
|
JANTXV (JTXV) |
JANTX with
Visual Inspection requirements |
|
JEDEC |
Joint Electron
Device Engineering Council |
|
JFET |
Junction Field
Effect Transistor |
|
JLCC |
J-Leaded Chip
Carrier |
|
JTAG |
Joint Test
Action Group |
|
LAT |
Lot Acceptance
Test |
|
LCC |
Leadless Chip
Carrier |
|
LEM |
Light Emission
Microscopy |
|
LFCSP |
Leadframe Chip
Scale Package |
|
LIMS |
Laser
Ionization Mass Spectroscopy |
|
LQFP |
Low Profile Quad
Flat Pack |
|
LSI |
Large Scale
Integration |
|
LTOL |
Low Temperature
Operating Life |
|
LTPD |
Lot Tolerance
Percent Defective |
|
MCM |
Multichip Module |
|
MCP |
Multichip
Package |
|
MEMS |
Micromachined
ElectroMechanical Systems |
|
MET |
Metal Layer |
|
MIC |
Mobile Ionic
Contamination |
|
MIL |
Military
Specification |
|
MIL-STD |
Military
Standard |
|
MM ESD |
Machine Model
Electrostatic Discharge |
|
MOS |
Metal Oxide
Semiconductor; PMOS (p-channel); NMOS (n-channel) |
|
MQFP |
Metal Quad Flat
Pack |
|
MRB |
Material Review
Board |
|
MSDS |
Material Safety
Data Sheets |
|
MSI |
Medium Scale
Integration |
|
MSL |
Moisture
Sensitivity Level |
|
MSP |
Mixed Signal
Processing |
|
MSOP |
Micro Small
Outline Package |
|
MTBA |
Mean Time Before
Assist |
|
MTBF |
Mean Time Before
Failure |
|
MTTF |
Mean Time To
Failure |
|
NDBP |
Non-destructive
Bond Pull |
|
NEMI |
National Electronics Manufacturing Initiative |
|
NPN |
Negative/Positive/Negative Bipolar Transistor |
|
OCAP |
Out-of-Control
Action Plan |
|
OEM |
Original
Equipment Manufacturer |
|
PCT |
Pressure Cooker
Test |
|
PDA |
Percent
Defective Allowable |
|
PDIP |
Plastic Dual
In-line Package |
|
PGA |
Pin Grid Array |
|
PIND |
Particle Impact
Noise Detection |
|
PLCC |
Plastic Leaded
Chip Carrier |
|
PLL |
Phase Locked
Loop |
|
PNP |
Positive/Negative/Positive Bipolar Transistor |
|
POLY |
Polysilicon |
|
PPM |
Parts Per
Million |
|
PROM |
Programmable
Read-Only Memory |
|
PSOP |
Power Small
Outline Package |
|
PQFP |
Plastic Quad Flat Pack
|
|
QCI |
Quality
Conformance Inspection |
|
QFP |
Quad Flat Pack |
|
QM |
Quality
Management |
|
QML |
Qualified
Manufacturer Listing |
|
QPL |
Qualified Parts
List |
|
Q&R |
Quality and
Reliability |
|
QSOP |
Quarter-size
Small Outline Package |
|
RAM |
Random Access
Memory |
|
RF |
Radio Frequency |
|
RGA |
Residual Gas
Analysis |
|
RHA |
Radiation
Hardness Assurance |
|
ROM |
Read-Only Memory |
|
SAM |
Scanning
Acoustic Microscopy |
|
SCDM |
Socketted
Charged Device Model |
|
SCR |
Silicon
Controlled Rectifier |
|
SDIP |
Shrink Dual
In-line Package |
|
SEC |
Standard
Evaluation Circuit |
|
SEM |
Scanning
Electron Microscope |
|
SHRT |
Solder Heat
Resistance Test |
|
SIMS |
Secondary Ion
Mass Spectroscopy |
|
SIP |
Single In-line
Package |
|
SIP or SIAP |
System
in a Package |
|
SJR |
Solder Joint Reliability |
|
SMD |
Standardized
Military Drawing |
|
SMD |
Surface Mount
Device |
|
SMT |
Surface Mount
Technology |
|
SOC |
System on a Chip |
|
SOG |
Spin On Glass |
|
SOI |
Silicon on
Insulator |
|
SOIC |
Small Outline
Integrated Circuit |
|
SOJ |
J-Leaded Small Outline
Package |
|
SOT |
Small Outline
Transistor |
|
SPC |
Statistical
Process Control |
|
SRAM |
Static Random
Access Memory |
|
SSI |
Small Scale
Integration |
|
SSOP |
Shrink Small
Outline Package |
|
ST |
Solderability
Test |
|
TEM |
Transmission
Electron Microscope |
|
THB |
Temperature
Humidity Bias |
|
TO |
Transistor
Outline |
|
TCI |
Technology
Conformance Inspection |
|
TCV |
Technology
Characterization Vehicle |
|
TDDB |
Time Dependent
Dielectric Breakdown |
|
TFP |
Triple Flat Pack |
|
TQFP |
Thin Quad Flat
Pack |
|
TQM |
Total Quality
Management |
|
TRB |
Technical Review
Board |
|
TRIAC |
Triode AC Switch |
|
TSOP |
Thin Small
Outline Package |
|
TSSOP |
Thin Shrink
Small Outline Package |
|
VLSI |
Very Large Scale
Integration |
|
VSOP |
Very Small
Outline Package |
|
W-CSP |
Wafer-level Chip
Scale Package |
|
WDX |
Wavelength
Dispersive X-ray |
|
WPT |
Wire Pull Test |
