MAIN TOPICS
What is a Semiconductor?
Semiconductor Manufacturing
Semiconductor Materials
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MANAGEMENT TOPICS
Lean Manufacturing
Just-In-Time (JIT) Manufacturing
Total Productive Maint. (TPM)
Total Quality Mgt. (TQM)
Kaizen
Hoshin Planning
Cellular Manufacturing
Statistical Process Cntrl (SPC)
Six-Sigma Quality Program
Poka Yoke (Error-Proofing)
The '8D' Process
The '5S' Process
The Balanced Scorecard
Knowledge Management (KM)
Enterprise Resource Planning (ERP)
Supply Chain Management (SCM)
Customer Relationship Mgt (CRM)
Crisis Management (CM)
Bench Marking (BM)
Succession Planning
Reengineering (BPR)
Activity-Based Costing (ABC)
The Learning Organization
Game Theory
Maslow's Hierarchy of Needs
ALL ABOUT ESD
What is ESD?
ESD Models
ESD Test Waveforms
ESD Sensitivity Levels
ESD Failures
ESD Specs/Standards
ESD Control/Prevention
ESD Audit Checklist
The Triboelectric Series
Semiconductor Photo Gallery
Great photos of product
and failure attributes explained!
FAQ'S
Equivalent Life of Temp Cycle
Distinguishing EOS from ESD
ESD Root Cause Analysis
Purpose of Preconditioning
Bake-Recoverable Failures
False Failures Induced by Rel
Failures due to Delamination
Electrical Test Guard Bands
Electrical Test Parameter Cpk
Analyzing Intermittent Failures
INDUSTRY LINKS
Semiconductor Industry Association
www.JEDEC.org
www.IPC.org
ESD Association
Global Semiconductor Alliance
ASEMEP / SEIPI
Semiconductor Stocks - CNN
Assembly / Test Subcons
SEMICONDUCTOR MANUFACTURING
Take some sand, purify it, make it flat, add materials to it, cut it into little chips, attach the chips to metal frames, connect wires to them, encase them in plastic, then test them. That's semiconductor manufacturing. Click to learn more...
WAFER
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EPITAXY
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SEALING
MARKING
DTFS
LEAD FINISH
FLIP-CHIP ASSY
TAPE BONDING (TAB)
ELECTRICAL TEST
BURN-IN
TAPE AND REEL
DRY PACKING
BOXING/LABELING
STRIP TESTING
RECOMMENDED READINGS
What is a semiconductor?
The p-n Junction
The Junction Diode
The Bipolar transistor
The MOSFET
The JFET
Semiconductor Quality
Quality Systems
Process Monitors/Controls
Document/Data Control
Metrology/Calibration
ISO-9000:2000
ISO-14000
QS-9000
TS-16949
TL-9000
AS-9100
ISO-13485
MIL-PRF-38535
GR&R
FMEA Overview
Failure Analysis
FA Techniques
FAILURE VERIFICAtion
Optical Inspection
X-ray Radiography
Curve Tracing
Hermeticity Testing
DECAPSULATION
Sectioning
Hot Spot Detection
LEM
Microprobing
Die Delayering
SEM/TEM / EDX/WDX
SAM
Focused Ion Beam
FTIR Spectroscopy
Auger Analysis
SIMS / LIMS
ESCA or XPS
AFM / STM
EBIC / OBIC
Chromatography
RGA
Other Techniques
Die-related Failures
Wafer-related Failures
Oxide Breakdown
Electromigration
Hot Carrier Effects
Mobile Ionic Contam
Latch-up
Alpha Soft Errors
Package-related Failures
Bond Lifting
Package Cracking
Corrosion
Tin Whiskers
Solder Joint Failures
Basic FA Flows
FA Lab Equipment
Wafer Fab Processes
CVD
PVD by Sputtering
PVD by Evaporation
Thermal Oxidation
Optical Lithography
Electron Lithography
Resist Processing
Wet Etching
Dry Etching
Lift-off Processing
Diffusion: Fick's Laws
Implant Damage Annealing
Si Epitaxial Growth
Polysilicon Deposition
Silicide Formation
Resistor Fabrication
Fab Isolation Techniques
Wafer Cleaning
Planarization
Gettering
Board Processes
PCB Solder Paste Printing
PCB Solder Reflow
Single Crystal Growing
Wafer Fabrication
Standard Assembly
Flip-Chip Assembly
Test/Backend
Laser Marking
Leadframes
Die Attach Materials
Bonding Wires
Molding Compounds
Marking Inks
Substrates/Interposers
Solder Pastes
Wafer Fab Equipment
Assembly Equipment
Assy Accessories/Tools
Test Equipment
Test Accessories
Loadboards
Contactors
Reliability Engineering
Process Qualification
Reliability Modeling
Reliability Tests
SHRT/Precon
Autoclave or PCT
Temp Cycle
Thermal Shock
Temp Humidity Bias
HAST
High Temp Op Life
Low Temp Op Life
High Temp Storage
Acceleration Test
Mech. Shock Test
Vibration Tests
Solderability Testing
Other Rel Tests
Solder Joint Reliability
Life Distributions
Life Distribution Functions
Lognormal Plots
Activation Energies
Assembly Engineering
Copper Wirebonding
The Chip Scale Package
The Ball Grid Array
System-in-a-Package (SIP)
Package-on-Package (POP)
Die Stacking
Wirebond Loop Profiles
Wirebond Metallurgies
Lead Finish Guides
Joining Processes
Deformation and Fracture
Glass Transition Temp, Tg
Test Engineering
Test Confidence
Test Yield Models
Strip Testing
Wafer-Level Test/Burn-in
ATPG - Test Pattern Gen
Built-in Self Test (BIST)
JTAG Boundary-Scan
Device Test Parameters
Boolean Algebra
Miscellaneous Topics
System-on-a-Chip (SOC)
Chip-on-Board (COB)
Chip-on-Flex (COF)
Wafer-Level Packaging
Silicon on Insulators (SOI)
Pb-free Initiatives
Factory Cleanrooms
Crystalline Defects
Wafer Pattern Defects
Finite Element Analysis
Electroluminescence
MEMS
What is ROHS?
What is WEEE?
RTL / DTL / TTL / CMOS
Factorial Experiments
PACKAGE TYPES
IC PRODUCTS
Digital Logic Gates
Flip-flops and Latches
Shift Registers
Digital Counters
Encoders / Decoders
Static RAMs or SRAMs
Dynamic RAMs or DRAMs
EPROMs / Flash Memory
Microprocessors
Operational Amplifiers
Instrumentation Amplifiers
Digital-Analog Converters
Analog-Digital Converters
Digital Signal Processors
Voltage Regulators
Analog Switches
Power Management IC's
Optocouplers/Isolators
Waveform Generators
Phase-Locked Loop IC's
Accelerometers
Charge-Coupled Devices
Motor Controllers
Application-Specific IC's
Other IC Products
QUICK REFERENCES
Acronyms
JEDEC Specs
MIL-STD Methods
MIL QCI Group Tests
MIL Lot Screening Tests
Assembly Glossary
Test Glossary
Summary of Rel Tests
IPC/JEDEC MSL Table
J-STD-33 Bake Tables
Hazardous Materials
Wet Etching Recipes
Properties of Si, Ge, GaAs
Properties of Si Dopants
Properties of SiO2, Si3N4
Lattice Constants
Physical Constants
Matl. Analysis Techniques
Oxidation Potential Table
Fab Chemical Reactions
Thermal Resistances
EM Spectrum Tables
Die Metallizations
Ohmic Contacts
GEN. MATH / STATISTICS
The t-Table
The t-Distribution
LTPD Sampling
AQL Sampling
Cpk Vs. ppm Table
ANALYSIS TOOLS
Ishikawa Diagram
Control Chart
Pareto Chart
Gantt Chart
Scatter Diagram
Matrix Diagram
Affinity Diagram
Tree Diagram
Nominal Group Technique
Structured Brainstorming
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